VMETRO combines the power of fiber-optics with Xilinx Virtex-5 FPGAs in an XMC module

VMETRO’s XMC-FPGA05F enables high-speed sensor I/O for embedded real-time DSP systems

XMC-FPGA05F User Programmable Virtex-5 FPGA XMC/PMC module with Quad Fiber-Optic Transceivers
XMC-FPGA05F User Programmable Virtex-5 FPGA XMC/PMC module with Quad Fiber-Optic Transceivers

VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced a new generation user programmable FPGA XMC/PMC module with fiber-optic transceivers. The XMC-FPGA05F, a follow-on to the very successful PMC-FPGA03F, incorporates the Xilinx® Virtex®-5 FPGA with four front panel fiber-optic transceivers in air- or conduction-cooled versions. The popularity of high-speed serial interconnects in embedded real-time DSP systems and the effectiveness of FPGAs to interface to sensor I/O makes the XMC-FPGA05F ideal for demanding real-time applications such as remote sensor interfaces, data recorders, and embedded real-time distributed computing.

The XMC-FPGA05F features a Xilinx Virtex-5 FPGA, high-speed fiber-optic transceivers, DDR2 SDRAM memory, DMA controllers and a choice of interfaces. The XMC-FPGA05F supports the Virtex-5 SX95T and LX155T FPGAs in the FF1136 package. Alternative FPGAs can be provided on request. Fiber-optic links are enabled by four single- or multi-mode, front panel, fiber-optic transceivers that support speeds including 2.015, 2.5 and 3.125Gbps. An IP core for fiber-optic protocols such as Aurora™, Serial FPDP, Serial RapidIO® or Ethernet can be loaded into the FPGA to handle data flow through the transceivers. The XMC-FPGA05F has four 128MB banks of DDR2 SDRAM memory with bandwidth approaching 1GB/s. The PMC/XMC form-factor board supports both PCI-X/PCI and x8 PCI Express® 1.1 host interfaces. DMA controllers simplify data movement with enough channels to support dedicated DMA controller for each fiber-optic interface. The XMC-FPGA05F has onboard FLASH to store multiple FPGA images and a “FLASH bypass mode” for secure applications to enable direct FPGA configuration by PCI, PCI-X or PCI Express host interfaces. In addition, there is a 64-bit user I/O option via either the PMC Pn4 or XMC Pn6 ports which is directly linked to FPGA for high-speed parallel or custom I/O from the backplane or host.

Development for the XMC-FPGA05F is supported by VMETROs FusionXF development kit. FusionXF includes a Software Development Kit (SDK) and an HDL Development Kit (HDK). The SDK provides host software support for Windows®, VxWorks® and Linux®, including a driver framework for high-speed DMA access between the XMC and host CPU, FPGA reconfiguration and diagnostics. The HDK contains the FPGA interface definitions and HDL functions to build a fully functional FPGA design. The HDK includes example designs that show how to implement common FPGA functions such as control registers, DMA engines and interrupts, and how to control these functions and communicate with them from software.

For more information, please visit www.vmetro.com/xmc-fpga05f