VMETRO expands VPX line with 6U VPX-REDI Buffer Memory Board

VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced the availability of the industry’s largest capacity 6U VPX buffer memory board, the MFC700.

MFC700 6U VPX Buffer Memory Node
MFC700 6U VPX Buffer Memory Node

VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced the availability of the industrys largest capacity 6U VPX (VITA 46) buffer memory board. The MFC700 is a 6U VPX-REDI (VITA 48) buffer memory node with support for up to 16GB of memory on the baseboard, dual XMC mezzanine sites and support for Serial RapidIO™ (sRIO) fabric. Designed for applications that buffer large amount of high-speed data, the MFC700 can be utilized in signal and image processing applications, as well as data recording subsystems. Uses of buffer memory include high-speed temporary storage, interleaving, data aggregation and warehousing or the need for additional system memory through a fabric.

The MFC700 supports up to 32GB DDR2 SDRAM memory in a single slot with 4-16GB on the MFC700 and two 2-8GB on VMETRO MM-6171 buffer memory node XMC modules. The board supports four x4 high-speed Serial RapidIO links to the VPX P1 connector via an 8-port Serial RapidIO switch and additional I/Os to the backplane. Dual Xilinx® Virtex®-5 FPGAs serve as the memory controllers for the DDR2 SDRAM with ECC memory. The MFC700 provides additional RocketIO™ connections between FPGAs and the backplane to give developers flexibility and performance in their data movement. The MPC700 also includes advanced, corner-turning DMA engines which are especially useful in matrix transposition, where converting from columns to rows can eliminate significant processor overhead.

In addition to supporting high-throughput backplane I/O, data may be brought into the MFC700 via onboard XMC sites. With dual XMC sites, the MFC700 enables I/O to be tightly coupled with a large system memory resource. This is useful for what is referred to as rate buffering of high throughput data (i.e., controlling the rate of flow of data through a system). incoming data from an XMC can be temporarily stored on the MFC700 and then passed to processing or recording nodes at a rate that does not overrun their capabilities.

The MFC700 supports VxWorks and Linux. An API is provided for integration with other boards.

The MFC700 is a VPX-REDI (VITA 46 & VITA 48)compliant with 1” pitch and is available in both air and conduction cooled versions.