Thierry Wastiaux, Interface Concept
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Very high-speed sampling and serial ADCs in embedded systems
Latest-generation active electronically scaled array (AESA) radar systems can have thousands of TX/RX modules. High bandwidth is needed to connect each array element data converter to the FPGAs that process incoming and generate outgoing data streams. New software-defined radio systems use advanced reconfigurable modulation schemes that increase channel bandwidths and deliver unprecedented wireless data rates. To increase the performance of software radio and electronic warfare systems, it has become critical to use efficient, low-power, low-pin-count, FPGA-connected converter interfaces.
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New electronic warfare architectures based on tight coupling of FPGA and CPU processing
Electronic Warfare (EW) system designers are taking advantage of the performance leaps in commercial technology, driven by high-volume commercial markets such as telecommunications and cloud computing. These components such as FPGAs combine speed, high connectivity, and low power consumption for signal-processing intensive EW platforms such as fighter aircraft and Unmanned Aerial Vehicles (UAVs).
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Hybrid radar and electronic warfare architectures
The Electronic Warfare (EW) market is increasingly diversified across almost every area of defense spending. Despite budget restraints, the market expects growth in the EW domain driven by the trend of EW systems to form a larger part of military activity. New technology offers engineers of EW or Electro-Optical/Infrared (EO/IR) systems the possibility to use remote high performance sensor modules using Gigabit/10 Gigabit serial interfaces to transmit their data sample flows. To manage and process this huge amount of data, engineers must define new, innovative, and open system architectures.
