Michelle Lange, Mentor Graphics
FPGA synthesis tools designed for DO-254 compliance are keeping modern aviation designs flying high in light of optimization vs. design assurance, SEU protection, redundancy control, and late design changes.
FPGA and ASIC design complexity is becoming an issue for many safety-critical industries. What was once a discrete component is now merely a block in a bigger system, but all within a single chip. Each block has its own function and likely its own clocking requirements. Because the number of independent (and asynchronous) clock domains is on the rise, the probability of bugs due to CDC issues is also growing. Metastability is a resulting problem, but automated tools for CDC verification can overcome the shortcomings of manual approaches and ensure complete resolution.