VPX strides forward with enhanced new specifications

VPX is the future of VME for aerospace and defense deployed systems. VPX increases the capability of today’s systems versus previous standards and provides for future enhancements. And several new VPX specifications are defining the future of military embedded computing.

VPX has been primarily known through its two original specifications: VITA 46 and VITA 48. VITA 46 (VPX) defines the electrical and mechanical characteristics of the module and VITA 48 (VPX-REDI) adds additional mechanical and cooling options. However, the VPX community has not stopped to rest on its laurels. The recently released VITA 65 (OpenVPX) specification goes beyond the module to develop system-level specification and address interoperability. Additionally, two new related specifications are in development:

  • VITA 66 (Fiber Optic Interconnect – formerly 46.12), which defines the use of fiber optic connectivity out the backplane
  • VITA 67 (Analog/RF Interconnect – formerly 46.14), which defines the use of coaxial out the backplane

VPX takes the lead

While VMEbus is expected to remain strong in legacy deployed systems, newer rugged deployed aerospace and defense platforms are rapidly turning to the VPX (VITA 46/48) and newly ratified OpenVPX (VITA 65) standards. The main reasons for this can be summarized in two words: performance and flexibility. There are many ways to measure performance, but two that really stand out are processing speed and I/O data rate. In both of these areas, VPX is superior to VME.

Processors have increased in speed and gone from one core to several. This gives a single chip greater absolute performance but has also resulted in higher power. Board-level products today are using multiple processors that range from 25 to 50 W each. Standard conduction- and air-cooling techniques cannot adequately cool processors with this amount of power in a 0.8" pitch VME chassis. VPX allows for a wider slot pitch (up to 1") and also defines alternative cooling techniques such as liquid-flow through (VITA 48.3) and air-flow through (VITA 48.5) that allow these higher-power processors to be adequately cooled at temperatures up to 85 °C card edge.

These higher-performance processors also require a larger data pipe to keep them busy. VPX provides for this by replacing the VME connectors with high-speed connectors capable of supporting greater than 6 Gbps signaling and by moving from a shared, parallel bus architecture to a serial switched fabric architecture. VITA 46 defines up to four ports or four lanes of serial switched fabric on the P1 data plane connector. Since this is a point-to-point switched fabric rather than a shared bus, each port can be simultaneously transmitting and receiving data. This results in a much higher bandwidth in and out of the board. For example, Serial RapidIO, gen 1, which operates at 3.125 Gbps on each lane, can provide a maximum data rate of 10 GBps using all four ports. This is more than 30x faster than the fastest VME protocol. The VPX connectors will also support second-generation switched fabrics, which will provide even higher data rates.

The VPX specifications also provide much greater flexibility. Two-level maintenance and system management are defined within the VPX specifications and are being used today. The VPX specification allows flexibility in the switched fabric protocol. In fact, Serial RapidIO, PCI Express, and 1 and 10 GbE are already defined. VPX also does not fix upon a single topology. The OpenVPX specification includes backplane profiles that support both centralized and distributed switching topologies. This allows users to tailor the topology to fit their application. Table 1 highlights some key capabilities and differences between “VPX” and VME. In regard to the table data, the term “VPX” encompasses VITA 46, VITA 48, VITA 65, VITA 66, and VITA 67.

Table 1: Some key capabilities and differences between “VPX” and VME. In regard to the table data, the term “VPX” encompasses VITA 46, VITA 48, VITA 65, VITA 66, and VITA 67.
(Click graphic to zoom by 1.9x)

OpenVPX to drive system interoperability

The flexibility provided by VPX allows products to be designed that meet specification requirements yet are incompatible with one another. For example, VPX does not define the location or the physical specification for Ethernet. One vendor could design a product with 1000BASE-T and another with 1000BASE-X and on different pins on the backplane. This makes it difficult for systems integrators to choose products from different companies and get them to interoperate. OpenVPX provides a framework for interoperability between modules and backplanes by defining a set of system specifications within VPX, reducing the use of proprietary approaches.

VITA 65 uses the concepts of planes to define and isolate traffic with different characteristics and requirements. Five planes are defined in VITA 65: utility, management, control, data, and expansion. Each plane is fixed to certain pins on the backplane and certain characteristics to ensure interoperability.

Building upon the planes is a set of system specifications. These specifications, called profiles, condense the large number of combinations and permutations between modules and backplane implementations. Each profile defines the characteristics for each of the planes so that within a given profile, all the characteristics are the same thus addressing interoperability. For example, the module profile MOD6-PAY-4F1Q2U2T-12.2.1-2 defines the data plane to be Serial RapidIO gen 1 at 3.125 Gbps and the expansion plane to be PCI Express gen 1 at 2.5 Gbps in addition to support for two ports each of 1000BASE-T and 1000BASE-X for the control plane (on different backplane pins). Figure 1 shows the VPX6-187, an example of an OpenVPX compliant module.

Figure 1: The VPX6-187 is an example of an OpenVPX compliant module.

The OpenVPX systems specification, recently ratified by ANSI, is the result of a cooperative group of vendors, suppliers, and system integrators who worked together to solve VPX system interoperability issues. By explicitly addressing system interoperability, OpenVPX accelerates the development and deployment process, reduces test times, and guarantees that modules from different vendors can coexist within a given system.

New standards on the horizon

Further enhancing VPX system flexibility are the VITA 66 and VITA 67 standards currently in development. As mentioned, VITA 66 defines the use of fiber optic connectivity out the backplane, and VITA 67 defines the use of a coaxial connection out the backplane. Both standards make a compromise in that the fiber optic or coaxial connector replaces one of the user I/O connectors (P2 – P6), thus reducing the amount of user I/O available.

By replacing a user I/O connector with a fiber or coaxial blindmate connector, these new standards will continue to support two-level maintenance concepts by allowing operators in the field to remove a fiber or coaxial module in the same way they remove any other VPX module.

Both standards are compatible with existing VPX standards. These standards are also compatible with the planes and profiles concepts of VITA 65, although new profiles will need to be created to support VITA 66 and VITA 67 boards. Also, depending on which connector is replaced, it is possible that not all of the planes in VITA 65 will be supported on a VITA 66 or VITA 67 board. For example, the expansion plane defined on P2 will not be available if the fiber or coaxial connector is used in place of P2. However, profiles will be created such that only the VITA 66 or VITA 67 modules are affected and not the whole system.

Both of the standards can benefit numerous military applications. For example, many systems use 1 or 10 GbE over fiber as their connection out of the chassis. Today this requires front panel I/O. While it is possible to bring a fiber signal in via the backplane, it requires using a proprietary technique to route the fiber to the rear of the board, snaking the cable around the board to the front panel because fiber still needs to connect to the board via the front panel.

Looking to the future

From the beginning, VPX was designed as the backplane architecture for aerospace and defense systems for the next 20 years. By focusing on an infrastructure that allows for flexibility and growth, VPX can adapt to newer, better technologies when they become available. Higher-performing fabrics and I/O options can be added to the infrastructure, and new system profiles can be designed to support them. VPX modules can support higher-power cards to meet the trend of increased power density at the component level while providing the infrastructure to cool these modules. Indeed, the future for VPX (and all its related VITA standards) is bright.

Steve Edwards is CTO for Curtiss-Wright Controls Embedded Computing. He was named a Curtiss-Wright Controls Embedded Computing Technical Fellow in 2008. Steve joined the company in 1998, in the position of senior hardware engineer, and has since held numerous leadership positions including technical product lead and product development manager. He was also responsible for the development of the company’s first FPGA-based computing platform. He can be contacted at Steve.Edwards@curtisswright.com.

Curtiss-Wright Controls Embedded Computing 703-779-7800 www.cwcembedded.com