VITA 41 (VXS) plays a key role in the VITA ecosystem

Since its inception in 2004 and formal release in 2006, () has become a vital part of the ecosystem. Its market share is growing in niche applications including customized open-standards-based designs.

The reason: VXS offers a significant performance boost over with a slot-to-slot bandwidth of 3,050 MBps, and its backwards compatibility is particularly attractive in many /aero, industrial, and medical applications. A higher-speed multigig in the P0 position and the added switched fabric capability significantly boost performance. The (VSO) has released VXS standards and subspecifications steadily over the past several years, and activity is ongoing.

Back to basics: Reviewing VXS 41.0-41.2

The base standard, 41.0, defines the payload and switch slot , pinouts, mechanical layout, and alignment . The switch slot has:

  • High-speed connectors for the switched fabric
  • A sideband connector for signals such as SYSFAIL# and SYSRESET#
  • A six-pin power connector

The VITA 41.0 standard requires glyphs on the front panel and the . There is a glyph for the payload slot and the switch slot. The payload and switch slots are keyed to prevent incorrect board insertion.

VITA 41.1 is the 4x InfiniBand Protocol standard. It assigns the signals for InfiniBand communication over the 41.0 data links. The standard defines requirements and recommendations for the use of the data links, InfiniBand in-band management, and I2C out-of-band management. InfiniBand uses 2.5 Gbps bidirectional links as the 1x base and in this standard scales to 4x links.

VITA 41.2 is the 4x Serial Protocol standard. The standard specifies the Serial RapidIO signals over the 41.0 data links. It provides guidelines for the use of the Serial RapidIO links, in-band management, and I2C out-of-band management. Serial RapidIO employs 1, 2.5, or 3.125 Gbps bidirectional links as the 1x links and scales to 4x links used in this standard.

What’s new with VXS?

In recent activity, VITA 41.6, 1x GbE Control Channel, has been approved by the VSO group and has gone to ANSI for accreditation. The control channel is parallel to the data plane defined in 41.0 and operates independently of the data plane. VITA 41.6 is implemented using SGMII, a high-speed serial Serializer/Deserializer (SERDES) link over a transmit and receive pair. The physical link operates at 1.25 Gbps. There are up to two links (250 MBps) per payload card. The for the control channel, which provides important management functions for VXS systems, are separate from the data plane.

VITA 41.8, Protocol Layer, specifies 10 GbE as the primary fabric using four XAUI at 3.125 Gbps each. An alternative configuration uses 10GBASE-KX4, which adds auto negotiation and better channel/backplane definition. VITA 41.8 is currently in ANSI ballot. This is an additional standard to add the of 10 GbE to VXS, which wasn’t specified before this standard was created.

Looking to future VXS activity, the next standards slated for release from the VSO to ANSI for accreditation are VITA 41.3 (Gbps Baseband IEEE 802.3 Protocol Layer) and VITA 41.4 (4x PCI Express Protocol Layer). These standards – in addition to VITA 41.6 and VITA 41.8 – are propelling VXS into a vibrant future for years to come.

Melissa Heckman has been an Electrical Engineer with Bustronic since 1998 and can be contacted at