Reconfigurable boards ease OpenVPX's protocol and interconnect challenges
OpenVPX’s (VITA 65’s) primary goal is to increase interoperability for VPX (VITA 46) technologies. And while OpenVPX is certainly a large step in the right direction, the many differing requirements across various applications make it impossible to standardize on a single high-speed serial protocol and associated interconnect topology. However, by providing for adaptable I/O, a reconfigurable OpenVPX board can allow system designers to explore different protocols and topologies – and mix and match them – providing a flexible interface to the rest of the system.
So many protocols, so little time
While initial versions of VME were standardized, as bandwidth needs grew, special secondary buses and data paths were added, often relegating the VMEbus to a simple control plane. High-speed switched serial protocols attempt to satisfy both the bandwidth needs of the data plane and the connectivity needs of the control plane, but the problem of too many different available protocols remains. There were hopes that the user community would eventually settle on one, but instead there are now three dominant protocols – PCI Express, Serial RapidIO, and 10 GbE – each with its own strengths and heritage.
While PCI Express provides ease of use from a software and system point of view, Serial RapidIO can’t be beat for data throughput and low latency. And 10 GbE is a natural fit in a networking-based application. All of these switch fabric protocols typically assume a backplane topology where each board is connected to a switch, and hence can access any other board in the system. These topologies can be single or dual star, with redundant switch slots.
While the switch fabrics and switched backplanes provide flexibility, they do come at a cost, both for the switch board itself and in terms of resources on each board for running the protocol. If all the application really needs is pure board-to-board data flows, the lightweight protocols – including SerialLite and Aurora – are perfect when combined with a point-to-point backplane topology like a ring. These lightweight protocols provide high throughput and low resource usage by not requiring the overhead of switched protocols.
Amidst so many switch fabrics and protocols, OpenVPX provides some help in figuring this all out by defining standard backplane and slot profiles covering the major topologies. But OpenVPX does not dictate one particular high-speed serial protocol or interconnect topology, instead enabling them all. This is where a reconfigurable OpenVPX board can truly provide a remedy.
Reconfigurable OpenVPX boards to the rescue
A reconfigurable OpenVPX board uses FPGA technology to allow adaptation to virtually any OpenVPX backplane, and hence system. With the ability to run any of the serial protocols – including PCI Express, Serial RapidIO, and 10 GbE, as well as the lightweight point-to-point protocols – a reconfigurable OpenVPX board can make use of the protocol that best fits the application. These boards can also be used to create systems that utilize multiple protocols, acting as a bridge between them. To get the best of both worlds, backplane topologies can even be mixed, for example combining a single switched fat pipe with a ring of board-to-board fat pipes. Along with the multi-gigabit interfaces, a reconfigurable OpenVPX board should also provide standard I/O, such as LVDS, to enable interfacing to other parts of the system. Besides direct backplane connections, a great way to do this is with a VITA 57 FPGA Mezzanine Card (FMC), which can provide tremendous system flexibility. With multi-gigabit transceivers and LVDS connected to both the VPX backplane and an FMC site, such an OpenVPX board can be easily adapted to meet system-interfacing needs.
A reconfigurable OpenVPX board is shown in Figure 1. This board has 15 multi-gigabit serial connections to the OpenVPX backplane and 10 to the VITA 57 FMC site. A single Ethernet interface is used for board control and setup, including reconfiguring the FPGA and burning FPGA images into the flash. With multiple FPGA images stored, these boards can be reconfigured with a simple command over Ethernet to match numerous OpenVPX profiles.