NanoATR shrinks VPX into byte-sized cubes - Interview with Bill Kehret, president and CEO of Themis Computer

3Editor’s note: From 6U down to 3U and from VME to VPX, the military’s venerable standard for rugged, deployable LRUs continues to evolve. And if Themis Computer’s NanoATR concept gains traction, 3U VPX could further be reduced to cigarette box-sized modules and packaged in cubes. Edited excerpts of our recent interview with Bill Kehret, Themis Computer president and CEO, follow.

VME: Dennis Smith from Themis proposed your new NanoATR standard at a recent VITA VSO meeting. What is the compelling factor behind the move?

KEHRET: Themis, after a number of years of not participating in the tactical mission payload systems market, now feels compelled to get in there with both arms and legs. The reason for our renewed interest is that we believe the OpenVPX [VITA 65] standard finally has the maturity and support it needs to attract a critical mass of third-party suppliers. That’s a game changer.

We think VPX is a very big deal. We chose to enter that market with 3U form factor ATR systems because the embedded computing industry wants smaller, lighter, and less costly packages. And if you look to the future growth of tactical mission payload systems, that growth will be in smaller and smaller tactical platforms, whether they’re for land, sea, or air.

VME: So why NanoATR?

KEHRET: Because extensibility is a key attribute. As you start to look at small form factors, it’s obvious that ATR is the dominant way of building extensible systems for mission and payload tactical applications. When we say “extensible,” we mean that there can be one processor and I/O, all in one slot, or that the system can be expanded to comprise two or three processors; the processors can collaborate, and they can have additional I/O. Usually when we say “extensible systems,” we mean bus and backplane type systems, but we could also be talking about bladed systems.

This extensible ATR packaging paradigm has served the industry well. At the low end, there’s just a huge proliferation of small form factor boards and systems. And there are only a couple of small form factor wares that really have created a de facto standard; yet those standards don’t begin to compare with the gravitas, if you will, of a VITA OpenVPX specification. The bottom line is something needs to be done in the small form factor space, or everyone will have an unhappy integration experience. The market will be limited in its growth for lack of de facto or formal standards.

VME: So an extensible system is inherently a board and backplane based system, although you did make allowances for blades.

KEHRET: Exactly. As we look at smaller systems, developers have to ask themselves if they want something that’s enduring, something that’s going to be around for another 10 years. They probably want something that, volumetrically, is significantly smaller than a 3U ATR box. So I would argue that even PC/104, by the time it’s packaged up, is too big. I mean, it’s modestly smaller than a small half-high 3U VPX, but it’s not significantly smaller. So we proposed the NanoATR standard to the VSO.

[Editor’s note: See Figure 1, a five-slot NanoATR system exploded view showing individual cigarette package-sized conduction-cooled modules.]

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Figure 1: A five-slot NanoATR system exploded view showing individual cigarette package-sized conduction-cooled modules

VME: What’s the ideal system envelope and LRU size?

KEHRET: The ideal size is probably the footprint of a security badge or credit card. And I suspect that even that size, in five years, will be considered large. And then we’ll be talking about board sizes half as large as a business card.

But today, a key consideration in developing smaller-sized systems is that engineers don’t get to design all-new connectors. They have to pretty much start with connectors that are state-of-the-art today, so Themis developed NanoATR using a common small form factor: COM Express, adapted for backplane use, using modern, high-density, high-performance connectors. The nanoETXexpress form factor is the smallest defined element of the COM Express family. However, while COM Express’ nanoETXexpress is an attractive small form factor, architecturally, it can’t be used as the basis for an extensible system.

VME: How does a NanoATR CPU module compare with the industry’s existing nanoETXexpress SBC?

KEHRET: Themis’ NanoATR has two slot configurations, one a 19 mm slot pitch and the other, a 12.5 mm pitch. One has a carrier board, which can be populated with active components, but it is, essentially, a carrier for something else. To use any standard nanoETXexpress card, the only thing that exists today is a CPU complex. So you can plug it onto our carrier and use brand “X’s” nanoETXexpress SBC as the root of a PCIe system.

VME: Will vendors eventually be creating various modules?

KEHRET: There are two potential options. Some vendors would like to see their I/O boards in this NanoATR ecosystem, and like the idea of NanoExpress. Unfortunately, there’s no concept of an I/O board in COM Express, because the I/O slots are on a passive motherboard.

So you’re going to have to get an existing board vendor to put his I/O on a smaller form factor and the only place that he can use it is the NanoATR. So the question is, “Why would you redesign to a spec that still has to plug onto a carrier card?” The answer is that you probably wouldn’t. You’d probably just have a baseboard with a backplane connector. That’s the future we see for many of the modules used with the NanoATR ecosystem.

VME: How does all of this relate to VPX?

KEHRET: There are actually enough pins or, more properly, enough columns on the connector, so that developers can map in 3U VPX’s P0, P1, and P2. Turns out there are a few extra row positions. But effectively, we have a mapping of P0 on the first 16 columns of the connector, P1 on the next 16 columns, and P2 on 16 of the last 18 available columns of a SEARAY 50-position, 8-row connector. So there are plenty of pins to do all the 3U VPX mappings, right onto a single 400-pin SEARAY right-angle connector. Thus, both VITA 46 and VITA 65 mappings can be accommodated.

VME: Which of the NanoATR signals are VPX?

KEHRET: They encompass practically all of VPX’s functionality. We’ve somewhat truncated the P0 only because there are more pin definitions for P0 than will ever be needed on these small systems. Like redundant power, there’s barely enough power on these small weapons and surveillance platforms. Otherwise, we have all of the pin pairs and they’re also in the same order. They have the same cross-talk, the same guarding, the same adjacencies. In effect, 3U VPX maps to our NanoATR connector, so existing VPX system integrators have the same rich backplane interconnects that they have come to expect, except now mapped into NanoATR’s much smaller footprint.

VME: What’s in the NanoATR system precisely?

KEHRET: [In the box-level envelope] we have a PSU board and connector board all mounted in one end of the card cage (frame). Each NanoATR module can accommodate single or stacked circuit boards that can be configured for processors, memory, I/O, SDR, GPS, and finally, a very compact, low insertion force, high mating-cycle capable backplane connector.

These tiny NanoATR systems are essentially cold-walled to their environment. Designers put whichever cold-wall attachments on the bare enclosure that they wish, and they get right down to each module’s heat spreader (“can”). The smallest system is just one module that we call a NanoPack. It, too, has a bare heat spreader “can,” but designers can adhesively attach fins or other heat exchangers. A fin system and a little bit of [the UAV’s] prop wash ducted from the propeller is adequate to cool the full 12 or 15 W thermal envelope of these diminutive systems. The NanoPack is a fully sealed system, with internal power conversion, and connector panel, internally mounted where the backplane connector would otherwise be mounted if the module were to be used in a NanoATR system.

VME: You refer to 12.5 mm and 19 mm modules. How are they oriented?

KEHRET: These dimensions are the slot pitch. There are two slot pitches. The 12.5 mm module encloses a single circuit card, and the 19 mm module can accommodate a two-or-more card stack.

VME: Why maintain VPX compatibility if there are really only signals inside the NanoPack system itself – and there are no legacy VPX signal PCBs to plug into your little backplane?

KEHRET: Oh, because VPX is a whole ecosystem that’s evolved over time. One could take a typical 3U VPX SBC, a typical 3U VPX Ethernet switch card, or an FPGA controller card and reformat it in a nanoETXexpress form factor. Then all of those signals could be routed to the internal backplane connector. Or, more likely, the entire 55 mm x 84 mm footprint would be used for a dedicated NanoATR module.

VME: Do you have any idea how the functionality of a typical 3U VPX SBC formats onto a nanoETXexpress PCB? Does it take two of them to be equivalent to one 3U VPX board?

KEHRET: Well, of course the new form factor is much smaller than 3U VPX. You can’t use many of the existing components. This new form factor really benefits from new, low-profile semiconductor packaging. It really leapfrogs into the next generation. Atom processors are just barely able to fit the power dissipation and footprint required of these diminutive systems. What I can tell you is that we expect these little systems to show up in many of the same applications that are using 3U VPX, today. For quite some time, VITA’s Ray Alderman has been beating the drums for intellectual property “cores” and Systems-on-Chip [SoCs]. The newest generation of high-density, low-power FPGAs can be mapped into VLSI at relatively low cost, and that totally opens up I/O possibilities.

VME: And the typical 3U VPX ATR in a half ATR short envelope – is that what you’re envisioning: a shoebox that’s essentially a 4-inch cube?

KEHRET: Right, and it uses way less than half of the total envelope volume. It might be as small as a quarter of the volume. And it’s not just that they’re smaller; they’re going to be significantly less expensive. Even though we map all the I/O pins, a mated connector pair of SEARAYs is around $25 versus $125 for a VPX mated set, if you have P0, P1, and P2.

VME: What’s the status of your proposal to VITA?

KEHRET: There are currently several Small Form Factor committees. NanoATR is VITA 74, and there will be others as well. We expect to have mechanical samples, along with a draft specification, by the end of July.

VME: What about traditional military applications – how do they fit into this new Nano system?

KEHRET: We’re planning to have GPS, Software-Defined Radio, and DSP, as well as several processor architectures. We also have a fully sealed, mission replaceable, high-capacity storage system end-cap. Our first systems should appear before year end.

Bill Kehret is founder and CEO of Themis Computer and a veteran of several embedded computing start-ups. An innovator in computer-based instrumentation and embedded computing, areas of interest include image processing as well as thermal and kinetic management. He graduated from The College of Wooster with a BA in Physics and Math, then went on to graduate studies in Electrical Engineering at Oregon State and Portland State universities. For more information, email info@themis.com.

Themis Computer 510-252-0870 www.themis.com