April 2005 Update

VSO ANSI accreditation
Accredited as a Standards Development Organization (SDO) in June 1993 by the American National Standards Institute (ANSI), the VITA Standards Organization (VSO) meets every two months to address vital embedded bus and board industry standards issues. Information on ANSI/VITA standards is available on the VITA website.

VSO study and working group activities
Standards within the VSO may be initiated by a study group, and developed by a working group. A study group requires only one VSO member, and is used to build interest in a standard. A working group requires at least three VITA members, and the proposed work must fit within the defined scope of VITA’s accreditation with ANSI.

VITA 17.2 – Serial FPDP Extension
VITA 17.2 provides for extensions to ANSI/VITA 17.1 and will support 2.5, 3.125, and 4.25 Gbaud data links. The goal of the working group is to maintain compatibility with ANSI/VITA 17.1 while increasing the bandwidth of the link and providing for a five-bit Cyclic Redundancy Check (CRC) for the header/trailer. The working group is sponsored by Curtiss-Wright Controls Embedded Computing, Mercury Computer, and TEK Microsystems.

ANSI/VITA 20 – Conduction Cooled PMC
ANSI/VITA 20 is being revised to handle possible connector fretting in high-vibration environments. A method for reducing the possibility of connector fretting was developed and received approval in a working group ballot. An ANSI ballot to revise ANSI/VITA 20 was completed in early January 2005. All ballots received were for approval. The results of the ballot was submitted to ANSI and it was recognized in February 2005.

VITA 41.0 – VME Switched Serial (VXS)
The VXS family of draft standards provides a method for implementing various serial fabric architectures within the VMEbus framework. While developing the Rear Transition Module draft standard, VITA 41.11, the working group determined that a change was required to the alignment pin that was also specified in the base draft, VITA 41.0. The change approved by the working group will provide addition margin, but will not change the original footprint and will work with existing designs. Two new pin assignment protocol draft standards have completed their first working group ballots. These include VITA 41.3 Gigabit Ethernet, and VITA 41.4 PCI Express. Comments are being reviewed and will be incorporated in the next revision of the drafts.

VITA 42 – Switched Mezzanine Card (XMC)
The XMC family of draft standards provides a method for implementing various serial/parallel fabric architectures on a PMC-like mezzanine module. The base level draft standard 42.0 defines the physical changes to the PMC module to support high-speed fabrics. Several dot level draft standards define the appropriate pin assignments for specific fabrics including parallel RapidIO, serial RapidIO, and PCI Express. VITA 42.0 has been submitted to the ANSI ballot process. Balloting should begin in February. A new dot standard effort, VITA 42.4, was approved at the January VSO meeting to develop the pin assignments for HyperTransport. Ken Boyette of Critia is the chair of this effort which is sponsored by AMD, Curtiss-Wright Controls Embedded Computing, and Critia.

VITA 46 – Advanced Module Format (Working Title)
The VITA 46 working group is developing a 3U/6U 160 mm deep module with a high-performance connector capable of supporting both high-speed parallel and serial fabrics for commercial and military environments. Most of the effort to date has focused on mechanical and environmental details. Some preliminary pin assignments for various protocols have been reviewed. The working group continues to work on the base level draft with a working group ballot planned for February 2005. Dot draft standards for VME pin assignments and PMC/XMC pin assignments are also under development.

The working group is focusing on Enhanced Ruggedized Design Implementation (ERDI). The goal of this draft standard is to define a general mechanical design implementation for circuit card assemblies that will enhance both their thermal performance and structural integrity. The preliminary draft has been completed and the working group continues to discuss and debate various issues including board-pitch, wedge-lock requirements, and liquid cooling deployment. Randy Banton of Mercury Computers is the chair of the working group.

VITA 49 – Digital Intermediate Frequency (IF)
The goal of the VITA 49 working group is to develop a new interconnect standard for passing a radio’s digitized IF data between computer boards. The working group has had a number of teleconferences and face-to-face meetings and continues to discuss the details of a proposed protocol.

VITA 50 – Best Practices for Electronic Module Cooling
Rex Harvey, Parker, led the working group in a discussion of a proposed outline for VITA 50 at the January VSO meeting. Rex will continue the discussion at the March VSO meeting.

VITA 52 – Lead Free Practices
At the November 2004 VSO meeting, Jim Robles, Boeing, discussed lead-free issues and the challenges they would present to the electronics community. Jim suggested that a study group be formed to look into this issue and determine if a standards effort was required. Jim is chair of the study group and is currently looking at similar efforts in other organizations.

. . . . .

John Rynearson is Technical Director of VITA. Previously, he founded Rystar, Inc. specializing in VMEbus training, and was one of the founders of Mizar, Inc., an early VMEbus company.

VITA – the VMEbus International Trade Association – was formed in 1984 to promote and enhance the VME standards, and to champion open standards in the embedded computing industry. VITA received accreditation as an ANSI-certified standards developer in 1993, and further received accreditation as an IEC-ITA certified standards developer in 2000.

For more information, contact John at:

P.O. Box 19658
Fountain Hills, AZ 85269
Tel: 480-837-7486
E-mail: techdir@vita.com
Website: www.vita.com